Up to this point, we have covered immediate, zero page, and absolute mode instructions. We have also covered, but have not really talked about, the "implied" mode. The implied mode means that information is implied by an instruction itself. In other words, what registers, flags, and memory the instruction is referring to. The examples we have seen are PHA, PLA, PHP, and PLP, which refer to stack processing and the accumulator and status registers, respectively.
|NOTE: The X register will be referred to as X from now on, and similarly A (accumulator), Y (Y index register), S (stack pointer), and P (processor status).|
Indexing plays an extremely important part in the running of the 6510 microprocessor. It can be defined as "creating an actual address from a base address plus the contents of either the X or Y index registers."
For example, if X contains $05, and the microprocessor executes an LDA instruction in the "absolute X indexed mode" with base address (e.g., $9000), then the actual location that is loaded into the A register is $9000 + $05 = $9005. The mnemonic format of an absolute indexed instruction is the same as an absolute instruction except a ",X" or ",Y" denoting the index is added to the address.
There are absolute indexed, zero page indexed, indirect indexed, and indexed indirect modes of addressing available on the 6510 microprocessor.
This only allows usage of the Y register as the index. The actual address can only be in zero page, and the mode of instruction is called indirect because the zero page address specified in the instruction contains the low byte of the actual address, and the next byte to it contains the high order byte.
|This page has been created by Sami Rautiainen.|
|Read the small print.||Last updated July 10, 2002.|