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System Specification for C65Fred BowenMarch 1, 1991

2.3.6 UART Operation

The device contains seven registers to control the different UART modes of operation. Section 2.2 describes how to access these registers.

The UART modes can be programmed by accessing the UART control register, URCR, whose bits function as described below.

2.3.6.1 UART Control Register (URCR)

BIT Bit Name Function
0 PARITY EVEN 1=Even Parity. If parity is enabled, the transmitter will assert the parity bit (P) to a low when "even" parity data is transmitted, otherwise it will pull it high. The receiver checks that the parity bit is asserted, or low, if the data received has even parity; if the bit is not asserted, the device will indicate a parity error,

0=Odd Parity. - If parity is enabled, the transmitter will pull the parity bit (P) low, when "odd" parity data is transmitted, otherwise it will pull it high. The receiver checks that the parity bit is asserted if the data received has odd parity; if the bit is not asserted when data had odd parity, the device will indicate a parity error.

1 PARITY EN 1= Parity Enabled.

0= Parity Disabled. The transmitter and receiver will not allocate a parity bit in the data, instead a stop bit will be used in its place. See the Data Configuration chart below

2,3CHAR LENGTH These two bits are used to select the number of bits per character to be transmitted or received. 5,6,7 or 8 bits per character may be selected as follows:
CH1 CH0
0 0 eight bits per character
0 1 seven bits per character
1 0 six bits per character
1 1 five bits per character
4,5UART MODE These two bits select whether operations will be asynchronous or synchronous for the transmitter and/or receiver. The actual selection is done as follows:
UM1 UM0
0 0 both transmitter and receiver operate in asynchronous mode.
0 1 receiver operates in synchronous mode, transmitter in asynchronous mode.
1 x receiver operates in asynchronous mode, transmitter in synchronous mode.



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Read the small print. Last updated April 09, 2006.