System Specification for C65 | Fred Bowen | March 1, 1991 |
Horizontal Sync Counter Events (assuming HPOS reg=0)
For NTSC the first 390 HCOUNT steps are at half the primary clock
rate, and 390 are at the primary clock rate, giving 520 counts foi 910
clocks. For PAL the first 388 HCOUNT steps are at the slow rate, and 132
are at the faster clock rate, giving 520 counts for 908 clocks.
EVENT | Clock | +256 | /2 | HCOUNT | Duration |
VSYNCI START | 513 | 769 | 384 | 384 | 846 | 59us |
VSYNCl STOP | 449 | 705 | 352 | 352 |
VSYNC2 START | 58 | 314 | 157 | 157 | 856 | 59us |
VSYNC2 STOP | 904 | 250 W | 125 | 125 |
HSYNC START | 513 | 769 | 384 | 384 | 63 | 4.4us |
HSYNC STOP | 576 | 832 | 416 | 442 |
HEQUl START | 513 | 769 | 384 | 384 | 36 | 2.5us |
HEQUI STOP | 549 | 805 | 402 | 414 |
HEQU2 START | 58 | 314 | 157 | 157 | 36 | 2.5us |
HEQU2 STOP | 94 | 350 | 175 | 175 |
BURST START | 576 | 832 | 416 | 442 | 47 | 3.3us |
BURST STOP | 623 | 879 | 439 | 488 |
HBLANK START | 478 | 734 | 367 | 367 | 175 | 12.2us |
HBLANK STOP | 653 | 909 | 454 | 518 |
Horizontal DMA Counter Events (these are actual counts -- decode 1 count earlier)
Event | HCOUNT |
HDMAEN START | 15 | 19 (640 mode) |
HDMAEN STOP | 335 | 339 (640 mode) |
HDEN START | 25 | 32 (38 col) |
HDEN STOP | 345 | 336 (38 col) |
HPIXEN START | 24 |
HPIXEN STOP | 344 |
SPR GO | 358 |
SPR STOP | 359 |
SPR CLOCK DIS | 360 |
SPR CLOCK ENA | 488 |
SPR DMA START | 372 (and EOL) |
SPR DMA STOP | 482 |
REFRESH START | 482 |
REFRESH STOP | 506 |
VINC | 370 |
HRES | 15 |
DOG START | 16 |
DOG STOP | 376 |
SYNC0 | 0 |
SYNC1 | 1 |
SYNC2 | 3 |
FAST | 390 NTSC | 388 PAL |