|System Specification for C65||Fred Bowen||March 1, 1991|
The C4567R6 can interlace scan lines to give a true NTSC, 525 line screen (625 lines on PAL versions), although the default, however, is a 262 line non- interlaced screen (312 lines on PAL versions). Set the INT bit in control register "B" to a "1" if you want interlacing.
The C4567R6 can also give a 400 line vertical resolution, which is useful, in the new Bitplane mode. Set the V400 bit, and the INT bit in control register "B" to a "1" to enable 400 line bitplanes. (see Bitplanes, below) The V400 switch will have no effect if the display is not interlacing. Also, although interlacing is permitted in all of the old video modes, the same data will appear on both odd and even rasters, even if the V400 switch is on.
The C4567R6 supports ultra-high resolution graphics by permitting the programmer to use 1280 pixel lines. This is enabled by setting the H1280 and H640 bits in control register "B" to a "1".
The 1280 pixels are acheived by time-multiplexing bitplane bits. This is done by substituting the pixel clock for bitplane 7. This means that for the first half of each pixel, the color palette will be fed the normal color index. For the second half of the same pixel, it will fed the normal index, plus 128. To utilize this feature, the user must program the color palette to perform the multiplexing function.
The H1280 bit can also be set H640 off. This is a unique mode that allows the use of 320 and 640 horizontal pixel bitplanes simultaneously.
|This page has been created by Sami Rautiainen.|
|Read the small print.||Last updated March 24, 2003.|