PARTNO XXXXX ; NAME U505; DATE March 9, 1989 ; REV 4 ; DESIGNER Haynie ; COMPANY Commodore ; ASSEMBLY 312828 ; LOCATION U505; /************************************************************************/ /* */ /* A2630 Amiga bus cycle control and refresh cycle control. */ /* */ /************************************************************************/ /* Allowable Target Device Types: 16R4B */ /************************************************************************/ /* Free Pins: 19(I/O) */ /************************************************************************/ /* HISTORY */ /* DBH May 3: Made from U505R7 */ /* DBH May 3: Added EXTERN qualification */ /* DBH May 5: Changed EXTERN logic, used CYCEND. */ /* DBH Sep 25: Modifications for Rev 3 PCB. */ /* DBH Mar 9: EXTERN qualifer removed from CYCEND. */ /************************************************************************/ /** Inputs **/ PIN 2 = !ASEN ; /* Adress strobe enable */ PIN 3 = !DTACK ; /* The Amiga Data transfer acknowledge */ PIN 4 = !EDTACK ; /* DTACK for a 6800 cycle */ PIN 5 = !ONBOARD ; /* An onboard device cycle */ PIN 6 = !AS ; /* Adress strobe */ PIN 7 = !BGACK ; /* Bus grant acknowledge */ PIN 8 = ARW ; /* DMA R/W line */ PIN 9 = !EXTERN ; /* Special or daughterboard access */ /** Outputs **/ PIN 18 = !S7MDIS ; /* Disable the S7M clock */ PIN 17 = DSEN ; /* Data strobe enable */ PIN 16 = !DSACKEN ; /* DSACK enable */ PIN 15 = CYCEND ; /* End of cycle */ PIN 14 = S_7MDIS ; /* Disable the S_7M clock */ PIN 13 = RW ; /* 68030 RW - routed only during DMA */ PIN 12 = !DSACKDIS ; /* DSACK disable */ /** Declarations and Intermediate Variable Definitions **/ /** Logic Equations **/ /* This is used to disable the DSACK latch. EXTERN here is basically extra insurance that no board-generated DSACK will come out for these special cycles. */ DSACKDIS = !AS ; /* This one disables the rising edge clock. It's latched externally. I qualify with EXTERN as well, to help make sure this state machine doesn't get started for special cycles. Since ASEN isn't qualified externally with EXTERN, everywhere here it's used, it must be qualified with EXTERN too. */ S7MDIS = !DSEN & ASEN & !EXTERN & DSACKEN; /* This one disables the falling edge clock. This is similarly qualified with EXTERN. */ S_7MDIS.D = ASEN & !EXTERN & CYCEND; /* Here we enable data strobe to the A2000. Are we properly considering the R/W line here? EXTERN qualification included here too. */ !DSEN.D = ASEN & !EXTERN & CYCEND; /* This creates the DSACK go-ahead for all slow, 16 bit cycles. These are, in order, A2000 DTACK, 68xx/65xx emulation DTACK, and ROM or config register access. */ !DSACKEN.D = !DSEN & CYCEND & !EXTERN & DTACK # !DSEN & CYCEND & !EXTERN & EDTACK # !DSEN & CYCEND & !EXTERN & ONBOARD; /* This one marks the end of a slow cycle */ !CYCEND.D = !DSACKEN & CYCEND; /** Logic Equations related to the DMA to RAM interface **/ RW = ARW; RW.OE = BGACK;