[1] This first table is a list of the example pixel clock values for the AAA
system.  The "mode" reflects a fixed monitor display mode, the frequencies
listed are those necessary to display each possible logical mode at that fixed 
video frequency.

			AAA PCLK Values

Mode		Emulates	Low End		High End

640x200		-----		14.318182	7.159091

640x400		-----		28.63634	14.31812
		640x200		28.63634	14.31812

800x560		-----		36.00000	18.00000
		640x200		31.70000	15.85000
		640x400		31.70000	15.85000

1024x768	-----		(64.00000)	32.00000
		640x200		(44.00000)	22.00000
		640x400		(44.00000)	22.00000
		800x560		(50.00000)	25.00000

1280x1024	-----		(110.00000)	55.00000
		640x200		 (60.45000)	30.22500
		640x400		 (60.45000)	30.22500
		800x560		 (68.70000)	34.35000
		1024x768	 (87.90000)	43.95000

() indicates theoretical value; currently, these are High End-Only modes

[2] This table is a matrix that takes in a code for monitor value and Low/High
end system and determines the value of each of the four possible pixel clock
channels.  At present we assume that, since software knows the monitor type, 
it won't attempt to use a pixel clock channel that's not defined for the 
particular monitor type.

Ideal clock switch matrix:

       INPUT		|		        OUTPUT
ID0  ID1  ID2  L/H	|  FREQ0	FREQ1		FREQ2		FREQ3
			|
 0    0	   0    0	|  14.318182	 xxx		 xxx		 xxx
 1    0    0    0	|  28.63634	 xxx		 xxx		 xxx
 0    1    0    0	|  31.70000	36.00000	 xxx		 xxx
			|
 0    0    0    1	|   7.159091	 xxx		 xxx		 xxx
 1    0    0    1	|  14.318182	 xxx		 xxx		 xxx
 0    1    0    1	|  15.850000	18.00000	 xxx		 xxx
 1    1    0    1	|  22.000000	25.00000	32.00000	 xxx
 0    0    1    1	|  30.225000	34.35000	43.95000	55.00000
			|
 All others		|   xxx		 xxx		 xxx		 xxx