To:	Lew Eggbrecht
	Re:	"Nyx" Development Board
	CC:	Jeff Frank, Greg Berlin

		The system as outlined in the specification I sent around
	is just about ready for PCB layout.  I'm resolving a few connector
	and socket issues, it should be ready in a couple of days.  

		As for a product, we'll obviously need to have some group
	meetings on just what we're going to do.  I'm working at home on 
	the last few revisions to my "Acutiator" specification, which will
	now take into account AAA and the potential for RISC or other CPUs
	beyond the 68040.  Acutiator calls for three or four gate arrays,
	depending on the exact implementation, to build a full fledged high
	performance system.  Only one is Amiga-chip specific.  Anyway, I
	hope to have this full specification ready late this week, and I 
	think its critical that we move on it quickly, assuming we decide 
	its the right way to go.  As for the specific questions you raised:

	a) DSP on motherboard

		The DSP is pretty tightly coupled with the host processor
	in the current A3000 architecture -- its not very practical to 
	have the DSP on the motherboard when the host CPU is on an processor 
	card. However, any next generation system is going to require a new 
	CPU slot.  This allows plenty of latitude in how the CPU vs. DSP 
	clocking is done (that's the main problem -- these need to be 
	synchronous).  So the DSP will be at home on either the motherboard 
	or CPU slot (basically, the system design doesn't make the CPU slot 
	anything real special, it's only a mechanical implementation detail).

	b) How to add "Dual System" upgrade.

		It's in some ways impractical to support both single and dual 
	systems on the same motherboard.  If we take the suggestions I made 
	in the Acutiator specification and locate the Amiga chip subsystem on
	an option card, this is much less of a problem, since an upgrade is
	done via Amiga card swap.  This should also mean that the Single 
	System Amiga card costs less, since it uses much less PCB real estate 
	than a Dual System.  Another option might be to locate just the 
	secondary Monica, Linda, and clock synthesizers on a different kind 
	of option card, but I feel the number of connections necessary would 
	make this unwieldy.  It would also require a substantial number of 
	motherboard configuration jumpers, resistor packs, etc.
	
	c) VRAM-only design.

		Assuming we're prepared to pay for it (I hear VRAM's only 
	around 20% extra nowadays anyway), I think this would be the best way 
	to go.  The memory module for the Nyx system allows DRAM, VRAM, and 
	satellite blitters, which would let us test everything possible.  But 
	for a practical system, especially if done as a replaceable card, I 
	think VRAM is what we're really concerned with.	

	d) 040-only design.

		Again going back to the Acutiator specification, the main 
	goal there was to propose a very high speed modular '040-based system.  
	If the processor is on a card, you have the option of dropping in some 
	other CPU, if on the motherboard, you're '040-only.  The 68060, as far
	as we've seen, would also drop into the system with no additional glue.
	
	e) What Gate Arrays are required.

		The Acutiator specification calls for three main gate arrays.
	One controls all aspects of motherboard operation: DRAM, bus 
	arbitration, interrupts, and non-Amiga peripherals (8520s, cheap 
	SCSI or cheap networks, IDE, practically anything else using Motorola, 
	Intel, or 6502 bus protocols) via a programmable I/O bus.  The second 
	gate array acts as an interface between the system bus and the chip 
	bus -- this turns out to be much like what the AAA specification calls
	for.  The third manages the Zorro II/Zorro III expansion bus.  There's
	an optional fourth gate array which acts as an intelligent buffer chip.
	It made lots of sense in building a high speed AA system, but is less
	likely to be needed in an AAA machine.  It still may turn out to be a
	cost savings vs. standard buffers and the PCB area needed for them,
	assuming it could be made fast enough.

	f) Processor Module for RISC

		The new Acutiator specification adds a small number of 
	extensions for 64-bit processor support.  The fast '040 DRAM 
	interface is 64-bits wide anyway, so you could add one of the latest 
	RISCs (MC88110, MIPS R4000, etc.) and expect peformance beyond that 
	of a typical 32-bit system.  I actually worked this out based on the 
	88110 bus, which is similar to the '040 bus, figuring that the '060
	bus would be similar.  As it turns out, the '060 is still 32-bit all
	around, but the '040 protocol is very clean, so I expect that a 
	RISC device would hook up with only a small amount of glue.  The
	big problem here is, of course, the software support.

	g) Update "Acutiator" spec for AAA system.

		As I mentioned, that's on its way.  Very little needs to 
	change to handle AAA, just the addition of a chip-bus interface 
	device designed	for AAA rather than AA.  This is actually a
	simplification, since AAA was designed to work well in the kind of 
	system I'm proposing, whereas you have to work around AA a bit to get 
	it mesh nicely (and deliver any decent display performance -- a 64-bit
	Chip bus on AA would offsent most of the bus loading problems you see 
	in the A4000, but it's complex to do the way AA is designed).

	That's about all I have for now.  The updated Acutiator specification
	will at the least be a good starting point for any new system 
	architecture.

						-Dave