| System Specification for C65 | Fred Bowen | March 1, 1991 |
The Character Memory is a 2048 byte block of memory that contains character image data. Each character definition requires 8 bytes in order to display a 8 x 8 bit character image. And there are 256 possible values for each character code, so 8 x 256, or 2048 locations are required. For each character definition stored in the character memory, the lowest of the eight memory addresses used by the character represents the top one of eight scan lines of the character. The leftmost pixel of each character is the most significant bit (bit 7) of the respective character memory byte.
Since the VIC-II modes can only access 16K bytes of memory, there are only eight choices where the Character Memory Block can be located. That location is selected by bits 1-3 of the memory Pointers register (address D018 hex). Special combinations of Character Memory Block and Video Bank selections determine whether the character image data is fetched from RAM or from ROM, as shown below.
CB bit VB bit Image hex
3 2 1 1 0 source address
- - - - - ------ -------
0 0 0 x x RAM (0-7FF) +VB
0 0 1 x x RAM (800-FFF)+VB
0 1 0 x 0 ROM D000-D7FF (C000-C7FF if CROM@C000)
0 1 0 x 1 RAM (1000-17FF)+VB
0 1 1 x 0 ROM D000-D7FF (C000-C7FF if CROM@C000)
0 1 1 x 1 RAM (1800-lFFF)+VB
1 0 0 x x RAM (2000-27FF)+VB
1 0 1 x x RAM (2800-2FFF)+VB
I 1 0 x x RAM (3000-37FF)+VB
1 1 1 x x RAM (3800-3FFF)+VB
The VIC-II modes have a 1024 or 2048 byte color and attribute memory, depending on whether 40 columns or 80 columns are selected. This memory is used to determine what color and what attributes are to be applied to each character in the video matrix. Color/Attribute RM is immovable. Physically, it is located at RAM locations 1F800-1FFFF. The CPU, however can access the 1024 byte portion at addresses D800-DBFF. It can access the entire 2048 byte block from D800-DFFE if the COL@DC00 bit is set in control register A. The CPU can also access Color/Attribute RAM directly at addresses 1F800- 1FFFF.
Standard Character Mode is selected by writing 0 to the ECM and BMM bits in Mode Register A (location D011 hex), writing 0 to the MCM bit in Mode Register B (location D016 hex), and by writing 0 to Control Register B (location D031 hex).
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