Multiplexed Address Bus Generation

The A and B memory address busses are multiplexed 2:1 to generate the MA and MB multiplexed address busses. Listed below are the primary addresses used to generate the multiplexed row and column addresses.

signal	row	column
MA0	A0	A5
MA1	A1	A6
MA2	A2	A7
MA3	A3	A8
MA4	A4	A9
MA5	A10	A13
MA6	A11	A14
MA7	A12	A15
MB5	B10	B13
MB6	B11	B14
MB7	B12	B15

ROM physical addresses

0000	New area A
2000	Basic
4000	New area B
5000	Character sets
6000	Kernal

ROM can appear (to the 4567) at 1000-1FFF (bank 0) and 9000-9FFF (bank 2)

The ROM address translates to 5000-5FFF