8520A COMPLEX INTERFACE ADAPTER

Clock ()  —  The clock is a TTL compatible input used for internal device operation and as a timing reference for communicating with the system data bus.

Chip Select ()  —  The input controls the activity of the 8520. A low level on while is high causes the device to respond to signals on the and address (RS) lines. A high on prevents these lines from controlling the 8520. The line is normally activated (low) at by the appropriate address combination.

Read/Write ()  —  The signal is normally supplied by the microprocessor and controls the direction of data transfers of the 8520. A high on indicates a read (data transfer out of the 8520), while a low indicates a write (data transfer into the 8520).

Address Bus (RS3-RS0)  —  The address inputs select the internal registers as described by the Register Map.

Data Bus (DB7-DB0)  —  The eight bit data bus transfers information between the 8520 and the system data bus. These pins are high impedance inputs unless is low and and are high, to read the device. During this read, the data bus output buffers are enabled, driving the data from the selected register onto the system data bus.

Interrupt Request ()  —  is an open drain output normally connected to the processor interrupt input. An external pullup resistor holds the signal high, allowing multiple -outputs to be connected together. The output is normally off (high impedance) and is activated low as indicated in the functional description.

Reset ()  —  A low on the pin resets all internal registers. The port pins are set as inputs and port registers to zero (although a read of the ports will return all highs because of passive pullups). The timer control registers are set to zero and the timer latches to all ones. All other registers are reset to zero.