2.3.7 CPU

2.3.7.1 Introduction

The 4502, upon reset, looks and acts like any other CMOS 6502 Processor, with the exception that many instructions are shorter or require less cycles than they used to. This causes programs to execute in less time that older versions, even at the same clock frequency,

The stack pointer has been expanded to 16 bits, but can be used in two different modes. It can be used as a full 16-bit (word) stack pointer, or as an 8-bit (byte) pointer whose stack page is programmable. On reset, the byte mode is selected with page I set as the stack page. This is done to make it fully 65CO2 compatible.

The zero page is also programmable via a new register, the "B" or "Base Page" register. On reset, this register is cleared, thus giving a true "zero" page for compatability reasons, but the user can define any page in memory as the "zero" page.

A third index register, "Z", has been added to increase flexibility in data manipulation. This register is also cleared, on reset, so that the STZ instructions still do what they used to, for compatability.

This is a list of opcodes that have been added to the 210 previously defined MOS, Rockwell, and GTE opcodes.

1. Branches and Jumps

    BCC label		word-relative
    BCS label		word-relative
    BEQ label		word-relative
    BMI label		word-relative
    BNE label		word-relative
    BPL label		word-relative
    BRA label		word-relative
    BVC label		word-relative
    BVS label		word-relative

    BSR label		Branch to subroutine (word relative)
    JSR (ABS)		Jump to subroutine absolute indirect
    JSR (ABS,X) 	Jump to subroutine absolute indirect, X
    RTN #		Return from subroutine and adjust stack pointer.

2. Arithmetic Operations

    NEG A		Negate (or 2's complement) accumulator.

    ASR A		Arithmetic Shift right accumulator or memory
    ASR ZP
    ASR ZP,X

    INW ZP		Increment Word
    DEW ZP		Decrement Word

    INZ 		Increment and
    DEZ 		Decrement Z register

    ASW ABS		Arithmetic Shift Left Word
    ROW ABS		Rotate Left Word

    ORA (ZP),Z		These were formerly (ZP) non-indexed
    AND (ZP),Z		now are indexed by Z register
    EOR (ZP),Z		(when Z=O, operation is the same)