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System Specification for C65Fred BowenMarch 1, 1991

2.3.7.4 65CE02 Addressing Modes

It should be noted that all 8-bit addresses are referred to as "byte" addresses, and all 16-bit addresses are referred to as "word" addresses. In all word addresses, the low-order byte of the address is fetched from the lower of two consecutive memory addresses, and the high-order byte.of'the address is fet ched the higher of the two. So, in all operations, the low-order address is fetched first.

Implied   OPR

The register or flag affected is identified entirely by the opcode in this (usually) tingle cycle instruction. In this document, any implied operation, where the implied register is not explicitly declared, implies the accumulator. Example: INC with no arguments implies "increment the accumulator".

Immediate (byte, word)   OPR #xx

The data used in the operation is taken from the byte or bytes immediately following the opcode in the 2-byte or 3-byte instruction.

Base Page   OPR bp   (formerly Zero Page)

The second byte of the two-byt e instruction contains the low-order address byte, and the B register contains the high-order address byte of the memory location to be used by the operation.

Base Page, indexed by X   OPR bp,X   (formerly Zero Page,X)

The second byte of the two-byte instruction is added to the X index register to form the low-order address byte, and the B register contains the high-order address byte of the memory location to be used by the operation.

Base Page, indexed by Y   OPR bp,Y   (formerly Zero Page,Y)

The second byte of the two-byte instruction is added to the Y index register to form the low-order address byte, and the B registpr contains the high-order address byte of the memory location to be used by the operation.

Absolute   OPR abs

The second and third bytes of the three-byte instruction contain the low-order and high-order address bytes, respectively, of the memory location to be used by the operation.

Absolute, indexed by X   OPR abs,X

The second and third bytes of the three-byte instruction are added to the unsigned contents of the X index register to form the low-order and high-order address bytes, respectively, of the memory location to be used by the operation.

Absolute, indexed by Y   OPR abs,Y

The second and third bytes of the three-byte instruction are added to the unsigned contents of the Y index register to form the low-order and high-order address bytes, respectively, of the memory location to be used by the operation.



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