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M1 SCHEMATIC ON PAGE 11
PIN
CONFIGURATION
[6551 pinout]
U3-801895-02
ACIA
SYNERTEKSYP6551A2 MHz
TRANSMIT/RECEIVE CHARACTERISTICS
CHARACTERISTICSSYM-02
2 MHZ
UNIT
MINMAX
TRANSMIT/RECEIVE CLOCK RATEtCCY*
400
-ns
TRANSMIT/RECEIVE CLOCK HIGH TIMEtCH175-ns
TRANSMIT/RECEIVE CLOCK LOW TIMEtCL175-ns
XTL1 TO TXD PROPAGATION DELAYtDD-500ns
RTS PROPAGATION DELAYtDLY-500ns
IRQ PROPAGATION DELAY (CLEAR)tIRQ-500ns
(tr, tf = 10 to 30 ns)
*The Baud Rate with External Clocking is:
BAUD RATE1
 --------------
 16 x TCCY
PIN
CONFIGURATION
[PLA pinout]
U19-251641-02
PLA
CSR/WD0-D7
L L DATA BUS TO PORT
L H PORT TO DATA BUS
H X ISOLATION
L = LOW LEVEL
H = HIGH LEVEL
X = IRRELEVANT
PIN
CONFIGURATION
[6529 pinout]
MOS6529B3 MHz
U5/U27-251640-03
SINGLE PORT
INTERFACE
[Plus 4 schematic #310164 (2 of 4)]
Plus 4 Schematic #310164 (2 of 4)



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This page has been created by Sami Rautiainen.
Read the small print. Last updated April 06, 2006.